Carry three genuine Pololu item 2128 A4988 Black Edition modules on one Smoothieboard Y socket. Each channel has STEP and DIR; all three share one active-low ENABLE signal. The design is a KiCad-only CERN OHL hardware project.
The historical proposal links discontinued item 1182. This prototype freezes the current, mechanically compatible item 2128 because its current and thermal claims are supported by a current product page and dimension drawing. Generic “Pololu-format” clones are outside the supported configuration.
Baseline documentation snapshot: 2026-10-11, before the requested connector/protection/usability revision program. New revision features require their own reviewed source and qualification evidence.
This page documents an unqualified engineering study, not a released or tested product. Saved CAD, renders and automated checks do not establish a safe assembly, compatible cable, firmware support or a usable current rating.
The retained design record states:
V21–v26 retain bounded readability/routing/assembly/drawing improvements. V25 moves the D1 GND via outside its actual land with an original-width extension; v26 corrects the schematic translation to40.64mm, preserving the1.27mm connection grid. Fresh parent v26 confirms ERC0/DRC12/opens9/parity0,149 pin assignments,79 matching package hashes and zero actual via drill/ring/mask-to-SMD overlaps. All six own views, schematic and both actual copper/outline/drill CAM faces were inspected.
Board-specific qualification limits: v26 is rejected for 12 strict mechanical findings and 9 opens; full checklist, current/thermal, host, component lots and physical qualification remain unsigned.
The exact connector orientation, pin mapping and supply ownership must be taken from the selected revision’s schematic and connection specification. Do not infer wiring from the connector shape.
Power off before connecting or changing jumpers. Verify pin 1, signal direction, supply voltage and ground at both ends of every cable. A mechanically fitting connector is not proof of electrical compatibility. If a host pin mapping or current allocation remains unresolved in the design record, do not connect the board until it is resolved.
The following are specification requirements or study assumptions; they are not measured operating ratings. A newer selected-revision note takes precedence over historical draft options.
See current review. Retain exact Pololu A4988 carriers; guide ICs and stocked Trinamic chips require new driver hardware and are not carrier substitutions. Prefer only electrically qualified V1 0603 passive families; no new version. Current selected v26; retained native/stock/physical qualification limits remain explicit.
Use the configuration and firmware contract for the exact selected revision. Do not copy another module’s socket assignments or assume that an unused pin is available. First-article work must verify source selection, reset/unplug behavior, cable orientation and the actual load or sensor interface before normal operation.
The following are requirements for the next design iterations; this page does not claim they are already fitted:
Documentation route: smoothieware.org/extensions/pololu-driver-breakout-board.
The 2026-10-11 upgrade program has saved additional candidates v27, v28, v29. These studies preserve the historical design described above. Their connector, LED, mechanical and protection changes are revision-specific and remain unqualified.
See the per-board changes, failures and remaining work and mandatory family specification. Use the source hash and native check for the exact candidate being reviewed; do not infer hardware ratings from a rendered population.
The three additional revisions are v27, v28, v29. They are engineering studies; saved CAD and renders do not release the hardware. The latest candidate is described below. Older baseline notes above remain historical.
919d9e3299bf2bb846607bee8f1ae4cdd186ac40a3512b68c4aba31ddd520b71.Applicable protection, current-path, thermal, pinout, cable access and physical tests remain open wherever the linked board record has not verified them. A zero native-error count does not close those gates.
The latest third additive candidate replaces the input fuse with an LTC4368 automatic-retry electronic breaker and an external reverse/backfeed FET pair. It adds soft-start gate shaping, separate fault/overvoltage LEDs, a floating timer for blinking reverse indication, and individual solder links to disable status LEDs. Existing motor, host/isolation and mounting-pin contracts remain requirements.
This is an unreleased implementation study. Native opens/errors, shunt sourcing and Kelvin routing, FET linear SOA, continuous current/thermal limits, regeneration, input transients and enclosure compaction remain qualification gates. The controller does not support hot-plugging an externally powered output above 24 V; boards with a higher output domain still need a different qualified topology for that mode. Do not treat the candidate as approved for fabrication or motor operation. Exact source hashes and native checks are in the readback section and per-revision NATIVE-CHECKS.md.
The saved v34 engineering candidate reduces the nominal rectangular outline from120×139mm to115×139mm:695mm² less board area, or4.17%. It preserves the existing mounting-hole centres, all footprints/pads/routes/vias and zone settings; only the right outline and three ground-zone boundaries change. Ground fill decreases by944.9975mm² across both layers. This is a measured CAD-area reduction, not a fabrication quote or verified current/thermal rating.
Fresh enabled native design/schematic checks have zero findings, compared with three baseline text-thickness warnings. The current revision title, board name and Black Edition restriction are complete and readable after correcting a native polygon serialization defect; the initial failed artwork remains recorded as historical. Independent review verified all14 filled title contours, six current populated/bare views,65 model entries,74 artifact hashes and1601 unchanged historical files. Both board documentation URLs remain readable.
The right mounting-hole centre is5mm from the trimmed edge, with3.4mm from drill edge to board edge. Actual washers, screw/tool access, connector/cable/body fit and the current/thermal effect of reduced ground copper remain unqualified. Fault, host and manufacturing qualification remain open. Fabrication release is false and price savings remain unverified.
e51a4f5945a3ea59ad4a124f615735adeb44b2305b4c8eeb2894fce1dfc772a2.Earlier revision contracts/readbacks remain historical; do not infer hardware approval from their renders.
The last historically verified clean 115 × 80 mm study had 0 native errors, 3 open connections and 0 schematic-parity differences. Subsequent local transition searches failed and were not promoted. The earlier scratch PCB/result folders were removed by the configured scratch reaper; those historical diagnostics are not a claim that the corresponding scratch CAD remains retained. No v35 PCB was promoted. Recovery must use retained numbered sources and portable helpers, followed by the required remote zero-violation gate, exports and all final views.
New PCB computation uses the pinned remote whole-job runner only. The portable native warning-repair helper is prepared as source; execution and its same-font title repair remain unverified. The remote runner itself must pass its isolated synthetic routing/publication qualification before production repairs continue. Acceptance and fabrication release remain false.