Research package for either an adapter to an existing external STEP/DIR drive or a new enclosed high-power Trinamic-based stepper drive; these are separate products.
Baseline documentation snapshot: 2026-10-11, before the requested connector/protection/usability revision program. New revision features require their own reviewed source and qualification evidence.
This page documents an unqualified engineering study, not a released or tested product. Saved CAD, renders and automated checks do not establish a safe assembly, compatible cable, firmware support or a usable current rating.
Board-specific qualification limits: v10/54 purchased identities match;56package/280later export hashes match;11dangling/nineopens/five ignorecats/current/thermal/physical open.
Power off before connecting or changing jumpers. Verify pin 1, signal direction, supply voltage and ground at both ends of every cable. A mechanically fitting connector is not proof of electrical compatibility. If a host pin mapping or current allocation remains unresolved in the design record, do not connect the board until it is resolved.
The following are specification requirements or study assumptions; they are not measured operating ratings. A newer selected-revision note takes precedence over historical draft options.
Current v10 review covers71records/54 purchased identities and existing V2 TMC2590/V1 inverter candidates. Retain architecture/conditional bypass,no successor. DCK stock does not fit selected DBV arrays;11dangling tracks/nineopens/host/current/thermal/isolation/physical gates remain.
Use the configuration and firmware contract for the exact selected revision. Do not copy another module’s socket assignments or assume that an unused pin is available. First-article work must verify source selection, reset/unplug behavior, cable orientation and the actual load or sensor interface before normal operation.
The following are requirements for the next design iterations; this page does not claim they are already fitted:
Documentation route: smoothieware.org/extensions/leadshine-like-external-stepper-drivers.
The 2026-10-11 upgrade program has saved additional candidates v11, v12, v13. These studies preserve the historical design described above. Their connector, LED, mechanical and protection changes are revision-specific and remain unqualified.
See the per-board changes, failures and remaining work and mandatory family specification. Use the source hash and native check for the exact candidate being reviewed; do not infer hardware ratings from a rendered population.
The three additional revisions are v11, v12, v13. They are engineering studies; saved CAD and renders do not release the hardware. The latest candidate is described below. Older baseline notes above remain historical.
9c0115487d5a7264c0bc17e5489a0dc01c75698d18518d4d10cedec5feabcabb.Applicable protection, current-path, thermal, pinout, cable access and physical tests remain open wherever the linked board record has not verified them. A zero native-error count does not close those gates.
The latest third additive candidate replaces the input fuse with an LTC4368 automatic-retry electronic breaker and an external reverse/backfeed FET pair. It adds soft-start gate shaping, separate fault/overvoltage LEDs, a floating timer for blinking reverse indication, and individual solder links to disable status LEDs. Existing motor, host/isolation and mounting-pin contracts remain requirements.
This is an unreleased implementation study. Native opens/errors, shunt sourcing and Kelvin routing, FET linear SOA, continuous current/thermal limits, regeneration, input transients and enclosure compaction remain qualification gates. The controller does not support hot-plugging an externally powered output above 24 V; boards with a higher output domain still need a different qualified topology for that mode. Do not treat the candidate as approved for fabrication or motor operation. Exact source hashes and native checks are in the readback section and per-revision NATIVE-CHECKS.md.
Protected source v17; current PCB SHA-256 655ca3c405ac418a2565ec6fe286c87efcf9c9c56107569caf24e8e44d727163. Fresh checks: zero enabled PCB errors/opens/parity and ERC errors; 10 PCB warnings. Electrical geometry, project rules and 107 historical files unchanged. Verified 87 model entries, 19 exports and 6 current population views, all inspected. Full documentation URL readable. Functional isolation only; VM 18-32V and 36V absolute maximum; provisional 2.3A RMS, thermal and regenerative PSU-sink limits remain unqualified Inherited native warnings and enabled-rule exclusions remain explicit Physical/thermal/current/connector-fit qualification open No priced or area savings established by annotation candidate.