Paired modulated optical emitter and receiver for tool-presence checking or non-certified machine interlock experiments.
Current retained engineering revision: v20, 2026-10-13. Both emitter and receiver have current CAD and connector-population packages; this is a partial repair with fabrication release withheld.
This page documents an unqualified engineering study, not a released or tested product. Saved CAD, renders and automated checks do not establish a safe assembly, compatible cable, firmware support or a usable current rating.
The v20 emitter repairs its LED-disable branch short, mounting keepout crossings and missing layer connection: fresh native checks report zero enabled errors/opens, nine inherited silk/text warnings, zero schematic-parity errors and zero electrical-rule errors. Receiver circuitry is unchanged and retains 23 enabled errors: 20 opens and three starved thermal connections, plus four text-thickness warnings. The paired board is therefore not electrically clean or fabrication-ready.
Normal and STEMMA populations each have six inspected views per role (24 images total); all 114 declared model instances resolve. Source-bound exports include both copper layers, drills, BOM/positions and schematic documentation. Rendering does not establish physical connector fit: alternate bodies overhang the board edge. Optical performance, assembly, current/thermal limits, cable/enclosure fit and host compatibility remain unqualified. Five inherited native rule categories remain ignored; no rule relaxation or new exclusions were used.
The canonical repository connector contract is pin 1 = +3.3 V, pin 2 = +5 V, pin 10 = GND. Current Smoothie V2 Prime web material appears to describe a conflicting header assignment; the physical target header must be continuity-checked against its authoritative schematic before KiCad release. The table below expresses design intent against the repository’s canonical contract, not proof of the live board pinout.
| Pin | Canonical role | Assigned function |
|---|---|---|
| 1 | +3.3V | +3.3 V rail |
| 2 | +5V | +5 V rail |
| 3 | GPIO! / type-specific | Beam fault/status |
| 4 | type-specific | Emitter enable optional |
| 5 | type-specific | Receiver diagnostics optional |
| 6 | type-specific | N/C |
| 7 | type-specific | N/C |
| 8 | type-specific | N/C |
| 9 | type-specific | N/C |
| 10 | GND | Ground |
Power off before connecting or changing jumpers. Verify pin 1, signal direction, supply voltage and ground at both ends of every cable. A mechanically fitting connector is not proof of electrical compatibility. If a host pin mapping or current allocation remains unresolved in the design record, do not connect the board until it is resolved.
The following are specification requirements or study assumptions; they are not measured operating ratings. A newer selected-revision note takes precedence over historical draft options.
The design describes the following protection intent. Check the selected schematic and remaining qualification gates before relying on it:
Current v16 pair review covers78records/57 purchased refs and existing TSSP4038/HC14/seven V1 bypass improvements. No successor. Receiver19opens,17blank purchasing MPNs,five ignored categories and14 stale historicalv01 render hashes remain explicit;waveform/optical/host/physical qualification open.
Use the configuration and firmware contract for the exact selected revision. Do not copy another module’s socket assignments or assume that an unused pin is available. First-article work must verify source selection, reset/unplug behavior, cable orientation and the actual load or sensor interface before normal operation.
The following are requirements for the next design iterations; this page does not claim they are already fitted:
Documentation route: smoothieware.org/extensions/laser-barrier-board.
The 2026-10-11 upgrade program has saved additional candidates v17, v18, v19. These studies preserve the historical design described above. Their connector, LED, mechanical and protection changes are revision-specific and remain unqualified.
See the per-board changes, failures and remaining work and mandatory family specification. Use the source hash and native check for the exact candidate being reviewed; do not infer hardware ratings from a rendered population.
The three additional revisions are v17, v18, v19. They are engineering studies; saved CAD and renders do not release the hardware. The latest candidate is described below. Older baseline notes above remain historical.
551520503fbc859bdcfcaa6101d5562720e1088a30a5ce45a18e7471b7683b33.JST_PH_B3B-PH-K_1x03_P2.00mm_Vertical. Fit only the selected population; check its pin map and voltage in the design record.8ee9b553a7439fe714328d832940f390ff9b51b164f0feed29bc1bc861552448.JST_PH_B3B-PH-K_1x03_P2.00mm_Vertical. Fit only the selected population; check its pin map and voltage in the design record.Applicable protection, current-path, thermal, pinout, cable access and physical tests remain open wherever the linked board record has not verified them. A zero native-error count does not close those gates.
Independent baseline/candidate checks show emitter geometric errors 7 to 0 and opens 1 to 0, with warnings 10 to 9. Receiver remains 3 geometric errors and 20 opens, unchanged; both roles have zero schematic/parity findings. All 24 current normal/STEMMA-PH images were inspected, with 114 resolving model references and 34 exports hash-verified. Complete framing is verified; inherited crowded labels, connector overhang/fit and documentation URL silk placement remain open. Frozen 218-file preservation and current 85-file v19 stability pass; the implementation did not persist a complete original 85-file pre-job ledger, so that stronger preservation claim is unverified. Registered as a partial family repair only; no fabrication or physical qualification.