Protect a standard endstop input from a field sensor whose signal may reach 48 V.
Baseline documentation snapshot: 2026-10-11, before the requested connector/protection/usability revision program. New revision features require their own reviewed source and qualification evidence.
This page documents an unqualified engineering study, not a released or tested product. Saved CAD, renders and automated checks do not establish a safe assembly, compatible cable, firmware support or a usable current rating.
Board-specific qualification limits: v12/18 purchased/16 identity strings match/2 stock blanks;61 selected/584 historical hashes;native0/U1.6 annular contact/startup/fault/thermal/physical open.
The table below uses the repository-canonical connector rule: pin 1 is +3.3 V, pin 2 is +5 V, and pin 10 is GND. Do not release a schematic from this table until it is reconciled pin-by-pin with the current V2 Prime connector implementation; current web documentation presents a conflicting ordering.
| Pin | Function | Design note |
|---|---|---|
| 1 | +3.3 V | Canonical fixed rail. |
| 2 | +5 V | Canonical fixed rail. |
| 3 | N/A | No Gadgeteer interface in this board scope. |
| 4 | N/A | No Gadgeteer interface in this board scope. |
| 5 | N/A | No Gadgeteer interface in this board scope. |
| 6 | N/A | No Gadgeteer interface in this board scope. |
| 7 | N/A | No Gadgeteer interface in this board scope. |
| 8 | N/A | No Gadgeteer interface in this board scope. |
| 9 | N/A | No Gadgeteer interface in this board scope. |
| 10 | GND | Canonical fixed rail. |
Power off before connecting or changing jumpers. Verify pin 1, signal direction, supply voltage and ground at both ends of every cable. A mechanically fitting connector is not proof of electrical compatibility. If a host pin mapping or current allocation remains unresolved in the design record, do not connect the board until it is resolved.
The following are specification requirements or study assumptions; they are not measured operating ratings. A newer selected-revision note takes precedence over historical draft options.
The design describes the following protection intent. Check the selected schematic and remaining qualification gates before relying on it:
Protection topology is the design blocker: require reverse polarity, overvoltage, surge, open-wire, and output-current limits.
Current v12 review covers24records/18 purchased parts and existing ISO1211 redesign/C2-R8 V1 stock classes. Host5V is mandatory;no successor. Candidate ordering codes/stock reels,U1.6 annular contact,startup/threshold/fault/thermal/independent/physical gates remain open.
Use the configuration and firmware contract for the exact selected revision. Do not copy another module’s socket assignments or assume that an unused pin is available. First-article work must verify source selection, reset/unplug behavior, cable orientation and the actual load or sensor interface before normal operation.
The following are requirements for the next design iterations; this page does not claim they are already fitted:
Documentation route: smoothieware.org/extensions/input-protector.
The 2026-10-11 upgrade program has saved additional candidates v13, v14, v15. These studies preserve the historical design described above. Their connector, LED, mechanical and protection changes are revision-specific and remain unqualified.
See the per-board changes, failures and remaining work and mandatory family specification. Use the source hash and native check for the exact candidate being reviewed; do not infer hardware ratings from a rendered population.
The three additional revisions are v13, v14, v15. They are engineering studies; saved CAD and renders do not release the hardware. The latest candidate is described below. Older baseline notes above remain historical.
9b2cf62518f1646cd94004ec041362bb1290b4c0141f0fa0778832e5f011aba7.JST_PH_B3B-PH-K_1x03_P2.00mm_Vertical. Fit only the selected population; check its pin map and voltage in the design record.Applicable protection, current-path, thermal, pinout, cable access and physical tests remain open wherever the linked board record has not verified them. A zero native-error count does not close those gates.
The additive v17 candidate preserves the protected v16 circuit, component positions, outline and electrical rules. It corrects revision labels and adds a readable complete HTTPS documentation link. Final source-bound parent checks report zero enabled electrical errors, open connections or schematic-parity findings, clean schematic checks and 7 remaining annotation/library warnings. All 12 declared populated/bare views and current manufacturing exports are checked against this source. Earlier component and revision selections on this page remain historical context. Physical fit, current/thermal performance, host compatibility and fabrication qualification remain unverified; no purchasing saving is claimed.
PCB SHA-256: 7a751e4ff74b0e0839c39eb01fac1469d1e11a0a198d2d64d1c1ea48a2a335d9.