Paired HOST and REMOTE boards carry one transparent SPI connection on four fixed-direction balanced data pairs. A separate two-wire link transports external 12 V power. This document reconciles the retained prototype contract; it does not certify the existing CAD or a physical assembly.
Baseline documentation snapshot: 2026-10-11, before the requested connector/protection/usability revision program. New revision features require their own reviewed source and qualification evidence.
This page documents an unqualified engineering study, not a released or tested product. Saved CAD, renders and automated checks do not establish a safe assembly, compatible cable, firmware support or a usable current rating.
Board-specific qualification limits: Native0 retained;ambiguous capacitor MPNs,12V-only assessed,timing/fault/physical open.
STATUS_N on pin 3; pin 3 is no connection at REMOTE. Pins 4 and 5 are unused at both ends.Power off before connecting or changing jumpers. Verify pin 1, signal direction, supply voltage and ground at both ends of every cable. A mechanically fitting connector is not proof of electrical compatibility. If a host pin mapping or current allocation remains unresolved in the design record, do not connect the board until it is resolved.
The following are specification requirements or study assumptions; they are not measured operating ratings. A newer selected-revision note takes precedence over historical draft options.
The design describes the following protection intent. Check the selected schematic and remaining qualification gates before relying on it:
HOST F1/D1/D2 form the 12 V PTC/reverse diode/TVS path; REMOTE D1/D2 guard the buck input. Four THVD1451 receivers provide the datasheet’s open/short/idle high state, subject to wiring and ground offset. HOST CS is pulled inactive-high when its S pin floats; SCK and MOSI are pulled low. The REMOTE OR gate forces high MISO while deselected, and the HOST buffer leaves S MISO high impedance while deselected. This is not a fault-detection or safety function. Cable open/short/reversal, unpowered endpoints and brownout require physical verification; surge immunity is not claimed.
Exhaustive current pair review: v14 HOST/REMOTE retain transparent channels/existing stock annotations,no successor.68 identities/159selected/2058 historical hashes match;actual HOST10k pull-ups supersede100k intent. Ambiguous capacitor MPN fields and12V-only assessed/timing/fault/physical gates remain open.
Use the configuration and firmware contract for the exact selected revision. Do not copy another module’s socket assignments or assume that an unused pin is available. First-article work must verify source selection, reset/unplug behavior, cable orientation and the actual load or sensor interface before normal operation.
The following are requirements for the next design iterations; this page does not claim they are already fitted:
Documentation route: smoothieware.org/extensions/differential-spi-signal-extender.
The 2026-10-11 upgrade program has saved additional candidates v15, v16, v17. These studies preserve the historical design described above. Their connector, LED, mechanical and protection changes are revision-specific and remain unqualified.
See the per-board changes, failures and remaining work and mandatory family specification. Use the source hash and native check for the exact candidate being reviewed; do not infer hardware ratings from a rendered population.
The three additional revisions are v15, v16, v17. They are engineering studies; saved CAD and renders do not release the hardware. The latest candidate is described below. Older baseline notes above remain historical.
6f8ceeed032944219c2e032167a4f3c706df1df5f9601444f1d9a1cf5aa3f04b.b8794eb336198e1d7016c4b6ef40ddd0136e2c21c0ee4f94b0c4a106302fcaa3.Applicable protection, current-path, thermal, pinout, cable access and physical tests remain open wherever the linked board record has not verified them. A zero native-error count does not close those gates.
The saved host and remote v18 candidates close two connections per role and clear the remote jumper overlap. They remain incomplete engineering candidates, with 19 host and 24 remote open connections. Fresh full-track native checks find no other enabled electrical errors or schematic parity errors, and no schematic-rule errors. Host retains 71 board warnings and one schematic library-link warning; remote retains 95 board warnings and two schematic library-link warnings. Enabled-rule results do not cover physical qualification or ignored rule categories.
Both roles have current revision labels and wrapped documentation URLs. Parent verification checked 127 unchanged baseline files, 151 source/artifact hashes, all model paths and twelve current normal-population views. The dense back-side instruction overlap remains visible. No alternate connector land pattern is declared for either role; connector conversion remains open.
03602a68ec5ac09e5cd1c57d9f9c6915f7ac10fdffba9cff307e5008fd9a70a7.6faa1f043d10dd93eb0f837294b25e25913452cd8418d7fb217d161ab97db721.The added power-net copper does not establish a load rating. Current, thermal, mounting, assembly, backfeed, fault-injection and signal-integrity qualification remain open. Manufacturing exports and renders are review artifacts; fabrication release is false. The v17 readback above remains historical.
Both V18 roles already fit a 50 × 50 mm outline. The host J3 input supplies the protected 12 V cable output; Gadgeteer J1 does not provide that field-power rail. The remote J3 user-wired supply feeds its protected buck input, while peripheral 5 V protection remains functional load protection. These circuits are retained. The existing 19 host and 24 remote opens remain unresolved; this classification review does not qualify either board for fabrication.