Translate a deliberately bounded set of digital signals between two Y-port voltage domains.
Baseline documentation snapshot: 2026-10-11, before the requested connector/protection/usability revision program. New revision features require their own reviewed source and qualification evidence.
This page documents an unqualified engineering study, not a released or tested product. Saved CAD, renders and automated checks do not establish a safe assembly, compatible cable, firmware support or a usable current rating.
The retained design record states:
Actual v10 retains seven independent SN74LVC1T45 directions and four already adopted V2 TPD4E1U06DCKR arrays. See complete76-record/43-purchased review. No new revision. Current variant is manually directed push-pull only; historical open-drain options below are not implemented, and arbitrary UART/SPI/I2C/hot-plug compatibility is not established.
Board-specific qualification limits: Twoopens/DRCexit5;marking/three failed checklist/physical gates open.
The selected PP7 variant has seven SN74LVC1T45 translation channels with independently set directions and four TPD4E1U06DCKR protection arrays. The two supply domains and channel directions must be explicitly configured.
Power off before changing connections. Use the selected schematic and a continuity check to verify connector orientation and pin numbering before first power.
The retained design is push-pull only. It does not implement the historical open-drain option or establish arbitrary I²C/SPI/UART compatibility. Validate supply sequencing, Ioff behavior, direction ownership and logic thresholds before connecting either side.
Use the configuration and firmware contract for the exact selected revision. Do not copy another module’s socket assignments or assume that an unused pin is available. First-article work must verify source selection, reset/unplug behavior, cable orientation and the actual load or sensor interface before normal operation.
The following are requirements for the next design iterations; this page does not claim they are already fitted:
Documentation route: smoothieware.org/extensions/bidirectional-level-shifting-board.
The 2026-10-11 upgrade program has saved additional candidates v11, v12, v13. These studies preserve the historical design described above. Their connector, LED, mechanical and protection changes are revision-specific and remain unqualified.
See the per-board changes, failures and remaining work and mandatory family specification. Use the source hash and native check for the exact candidate being reviewed; do not infer hardware ratings from a rendered population.
The three additional revisions are v11, v12, v13. They are engineering studies; saved CAD and renders do not release the hardware. The latest candidate is described below. Older baseline notes above remain historical.
51e100858c4b2d8d9836be1b808808ce26318002c4b9642acf65fecfb1fca082.Applicable protection, current-path, thermal, pinout, cable access and physical tests remain open wherever the linked board record has not verified them. A zero native-error count does not close those gates.
The additive v17 candidate preserves the protected v16 circuit, component positions, outline and electrical rules. It corrects revision labels and adds a readable complete HTTPS documentation link. Final source-bound parent checks report zero enabled electrical errors, open connections or schematic-parity findings, clean schematic checks and 0 remaining annotation/library warnings. All 6 declared populated/bare views and current manufacturing exports are checked against this source. Earlier component and revision selections on this page remain historical context. Physical fit, current/thermal performance, host compatibility and fabrication qualification remain unverified; no purchasing saving is claimed.
PCB SHA-256: 90d4218f79cc27d746ac33d850fa410dcf1e9899060e93e73bdc268a03d71d3b.